Showing posts with label vhdl ring counter. Show all posts
Showing posts with label vhdl ring counter. Show all posts

Monday, 13 January 2014

how to read content from text file and How to write content in text file in VHDL


--PROGRAM TO READ CONTENT FROM ONE FILE AND WRITE IT IN to ANOTHER FILE

--THIS PROGRAM HAS TO BE WRITTEN IN TESTBENCH MODULE

--INPUT AND OUTPUT text FILES SHOULD BE PRESENT IN YOUR PROJECT FOLDER

 

library ieee;

use ieee.std_logic_1164.all;

use STD.Textio.all;--PACKAGE CONTAIN FUNTIONS RELATED TO FILE READ/WRITE OPERATION

 

entity FA_TESTS is

end FA_TESTS;

architecture behavioral of FA_TESTS is

begin

 

process

file infile :text; --DEFINES INPUT FILE_HANDLE AND TYPE OF FILE

file outfile :text;--DEFINES INPUT FILE_HANDLE AND TYPE OF FILE

variable buff: line;--VARIABLE WITH TYPE LINE TO READ COMPLETE LINE/ROW AT A TIME

 

begin

file_open(infile,"gnc.txt",read_mode); --OPEN FILE NAME "GNC.TXT' TO READ CONTENT FROM THAT FILE

file_open(outfile,"gncc.txt", write_mode);--OPEN FILE NAME "GNCC.TXT" TO WRITE CONTENT TO THAT FILE

for i in 1 to 4 loop  --AS INPUT FILE "GNC.TXT" CONTAIN CONTENT OF 4 LINE

readline(infile, buff); --TO READ A LINE FROM INPUT FILE

writeline(outfile,buff);--TO WRITE A LINE TO OUTPUT FILE

end loop;

file_close(infile);--NECESSARY TO CLOSE OPEN FILE

file_close(outfile); --NECESSARY TO CLOSE OPEN FILE

wait;--TO HALT THE PROGRAM / TO AVOID INFINITE EXECUTION OF PROGRAM

end process;

 

end  behavioral;